1. Field of the Invention
The present invention relates in general to a current mode step-down switching regulator, and more particularly to an over-current limiting circuit of a current mode step-down switching regulator.
2. Description of the Related Art
FIG. 6 shows a circuit diagram of an over-current limiting circuit of a conventional current mode step-down switching regulator. A switch 107 serves to supply an input voltage VIN to a coil 109. An error amplifier 101 amplifies a difference between a voltage obtained by dividing an output voltage VOUT at an output terminal 113 with a first resistor 110 and a second resistor 111, and a reference voltage VREF supplied from a reference voltage source 100.
A signal which is obtained by subtracting a correction ramp wave outputted from a slope correcting circuit 102 from an output signal from the error amplifier 101 in a subtracter 103 is inputted to an inverting input terminal of a comparator 104. The correction ramp wave outputted from the slope correcting circuit 102 has a saw-tooth-wave shape as shown in FIG. 6.
A signal which is obtained by converting a current caused to flow through the switch 107 into a voltage is inputted to a noninverting input terminal of the comparator 104. While not illustrated, normally, the current is detected using a sense resistor connected in series with the switch 107. The signal having a value proportional to the current caused to flow through the switch 107 is inputted as voltage information to the noninverting input terminal of the comparator 104.
When the output voltage VOUT is low, an output voltage from the error amplifier 101 increases. Hence, in order that a logical state of the comparator 104 may change from L to H, a voltage signal having a larger value needs to be applied to the noninverting input terminal of the comparator 104. That is, when the output voltage VOUT is low, causing a more current to flow through the switch 107 inverts the output signal from the comparator 104. An output signal from the comparator 104 is inputted to a reset terminal R of an SR-latch 106 through an OR circuit 115.
An oscillator 105 is connected to a set terminal S of the SR-latch 106. A pulse signal having a fixed period as shown in FIG. 6 is outputted from the oscillator 105. An output terminal Q of the SR-latch 106 is connected to the switch 107. When a voltage level at the output terminal Q of the SR-latch 106 becomes H, the switch 107 is turned ON.
Similarly to the case of the comparator 104, the signal which is obtained by converting the current caused to flow through the switch 107 into the voltage is inputted to a noninverting input terminal of an over-current detecting comparator 114. As described above, normally, the current is detected using the sense resistor connected in series with the switch 107. The signal having the value proportional to the current caused to flow through the switch 107 is also inputted as the voltage information to the noninverting input terminal of the over-current detecting comparator 114.
In addition, a reference voltage source 113 is connected to an inverting terminal of the over-current detecting comparator 114. An output terminal of the over-current detecting comparator 114 is connected to one input terminal of the OR circuit 115. When the current being caused to flow through the switch 107 increases, the voltage inputted to the noninverting input terminal of the over-current detecting comparator 114 increases accordingly. When this voltage becomes higher than the voltage set by the reference voltage source 113, the voltage level of the output signal from the over-current detecting comparator 114 becomes High. Thus, since the OR-latch 106 is reset, the switch 107 is turned OFF. That is, when an operation state becomes an over-current state, the switch 107 is turned OFF. As a result, an over-current limiting function of preventing the current from being caused to flow any more operates.
Upon turn-OFF of the switch 107, the value of the current caused to flow through the switch 107 becomes zero. Thus, since the voltage level of the output signal from the over-current detecting comparator 114 becomes Low, the SR-latch 106 is set with a next pulse outputted from the oscillator 105 to turn ON the switch 107. When the current caused to flow through the switch 107 increases again, the operation is repeatedly carried out in which the voltage level at the noninverting input terminal of the over-current detecting comparator 114 becomes High to turn OFF the switch 107 (refer to a detailed block diagram of a PWM controller (page 14) in a data sheet of a step-down controller, “MAX796/MAX797/MAX799”, for a synchronous rectification type CPU power supply manufactured by MAXIM CO., LTD.).
When a load current increases to provide an over-current limiting state, the output voltage VOUT at the output terminal 113 decreases and thus a stable state is obtained. However, since the input voltage VIN at the input terminal 117 is constant, Duty of a signal used to control the switch 107 becomes small. Duty is practically determined by the following equation:Duty=VOUT/VIN 
When Duty becomes small, an influence by response delay in the comparator 104 and the over-current detecting comparator 114 to Duty becomes large. FIG. 7 shows a relationship between a load current IOUT caused to flow through a load 116 connected to the output terminal 113, and the output voltage VOUT. When the load current IOUT exceeds an over-current detection level indicated by a point A, the over-current control function operates to make the output voltage VOUT 0 V. If a delay time of the comparator is zero, Duty is practically determined based on the equation of Duty=VOUT/VIN. However, in practice, the comparator has a delay time, and the delay time exerts an influence on Duty. When Duty (Duty time) determined by VOUT/VIN is large, the delay time in the comparator can be disregarded. However, when Duty becomes small, the influence by the delay time in the comparator cannot be disregarded. In the case of the conventional circuit shown in FIG. 6, there is encountered a problem in that when the output voltage VOUT is low, Duty cannot be reduced to a level equal to or smaller than the delay time in some cases due to the influence by the response delay of the comparator, and hence the over-current limiting function cannot operate.
The response delay in the comparator is constant irrespective of an oscillation frequency of the saw-tooth-wave outputted by the slope correcting circuit 102. Consequently, when the oscillation frequency becomes high, the influence by the delay time in the comparator becomes large similarly to the case where Duty becomes small. When the current limiting function does not operate, there arises a problem in that the current caused to flow into the coil 109 and the current caused to flow through the switching element 107 cannot be limited. Also, when the current exceeds an allowable current value, it becomes impossible to obtain the original inductance value. Moreover, when a MOSFET is used in the switching element 107, the MOSFET is heated.